On Sat, 16 Apr 2005, Eugene de Villiers wrote:
> I have been testing the performance of an IWILL H8501 8-way opteron
> system and have been getting some surprisingly bad results.
Given that a multiprocessor Opteron is a NUMA machine, I would suggest
playing with BIOS memory settings. In the Tyan BIOS that I have, they
are called "Bank Interleaving" and "Node Interleaving", with the
latter being the more important for this case in my opinion. You
should be able to find details about what they mean with a web search
engine...
> 3. Would a hyper transport specific RPI improve matters or is this
> more likely to be a capacity/latency issue?
I don't think that a HyperTransport RPI could be written, simply
because the details of HyperTransport are not available to user
applications. I think that it is a memory access latency issue and
this can be changed with the BIOS options. I don't know if even the
kernel can easily change the memory interleaving settings mentioned
above.
> I would be glad to perform and post more tests if it would help.
Please post the speedup figures that you obtain with different memory
interleaving settings.
--
Bogdan Costescu
IWR - Interdisziplinaeres Zentrum fuer Wissenschaftliches Rechnen
Universitaet Heidelberg, INF 368, D-69120 Heidelberg, GERMANY
Telephone: +49 6221 54 8869, Telefax: +49 6221 54 8868
E-mail: Bogdan.Costescu_at_[hidden]
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